HEWLETT-PACKARD COMPANY
SUPER VGA BOARD
| 
 Category  | 
 Video  | 
| 
 Video Types Supported  | 
 XVGA  | 
| 
 Video Processor  | 
 Unidentified  | 
| 
 Highest Resolution Supported  | 
 1024 x 768  | 
| 
 Data Bus Type  | 
 16-bit ISA  | 
| 
 Memory Type  | 
 DRAM  | 
| 
 Maximum Onboard Memory  | 
 512KB  | 
| 
 CONNECTIONS  | |||
| 
 Purpose  | 
 Location  | 
 Purpose  | 
 Location  | 
| 
 15-pin analog video port  | 
 CN1  | 
 VGA feature connector  | 
 CN2  | 
| 
 VIDEO MEMORY CACHE CONFIGURATION  | ||
| 
 Setting  | 
 SW1/4  | |
| » | 
 Enabled  | 
 On  | 
| 
 Disabled  | 
 Off  | |
| 
 EMULATION MODE CONFIGURATION  | ||
| 
 Setting  | 
 SW1/5  | |
| » | 
 Enabled  | 
 On  | 
| 
 Disabled CGA & HGC  | 
 Off  | |
| 
 BIOS ROM ACCESS SELECTION  | ||
| 
 Mode  | 
 SW1/6  | |
| » | 
 16-bit  | 
 On  | 
| 
 8-bit  | 
 Off  | |
| 
 Note: Switch SW1/6 is used in conjunction with jumper E2.  | ||
| 
 MEMORY ACCESS SELECTION  | ||
| 
 Mode  | 
 SW1/7  | |
| » | 
 16-bit  | 
 On  | 
| 
 8-bit  | 
 Off  | |
| 
 VGA PURE MODE CONFIGURATION  | ||
| 
 Mode  | 
 SW1/8  | |
| » | 
 Enable Super VGA Board extensions  | 
 On  | 
| 
 Force pure IBM VGA modes  | 
 Off  | |
| 
 VERTICAL INTERRUPT CONFIGURATION  | ||
| 
 IRQ 2/9  | 
 E1  | |
| » | 
 Disabled  | 
 Pins 2 & 3 closed  | 
| 
 Enabled  | 
 Pins 1 & 2 closed  | |
| 
 16-BIT ROM DECODE CONFIGURATION  | ||
| 
 Setting  | 
 E2  | |
| » | 
 C000h - C7FFh memory segment is enabled  | 
 Pins 1 & 2 closed  | 
| 
 Decodes memory segments C000h - DFFFh  | 
 Pins 2 & 3 closed  | |
| 
 FACTORY CONFIGURED - DO NOT ALTER  | |
| 
 Switch  | 
 Position  | 
| 
 SW1/1  | 
 On  | 
| 
 SW1/2  | 
 On  | 
| 
 SW1/3  | 
 On  | 
| 
 DRAM CONFIGURATION  | ||
| 
 Memory  | 
 Bank 0  | 
 Bank 1  | 
| 
 256KB  | 
 (8) 64K x 4  | 
 NONE  | 
| 
 512KB  | 
 (8) 64K x 4  | 
 (8) 64K x 4  |