Subject: Re: cctech digest, Vol 1 #417 - 55 msgs

From: Peter Sahlstrom <[email-masked]>
Date: Thu Mar 13 15:03:01 2003

> From: "Chandra Bajpai" <[email-masked]>
> To: <[email-masked]>
> Subject: RE: collecting silicon wafers
> Date: Wed, 12 Mar 2003 08:02:08 -0500
> Reply-To: [email-masked]
> 
> I got to ask this...what's a wafer mask...what's it look like?
> 
> -Chandra

It is the layout used to produce designs on a silicon wafer.  They are
usually square, and made of quartz (to minimize UV dispersal), with a
coating of etched chromium on one side.  When photoresist has been
deposited on a wafer, the wafer is loaded into a mask aligner.  This
allows the mask to be aligned with existing patterns on the wafer
before being exposed to UV light.  Once the exposure is complete, the
wafer is developed, and a pattern of hardened photoresist is left
behind.  This is then used to control deposition areas in later steps
of the process.

-Peter

-- 
Peter Sahlstrom                       __    __    ( )    ____    _____
CMOS Process Technician              /  \  /  \    _    / __ \  / ___/
GT Microelectronics Research Center / /\ \/ /\ \  | |  / _  _/ / /__
[email-masked]                /_/  \__/  \_\ |_| /_/ \_\  \___/