Subject: RE: H89 disk transfer program

From: "Dwight K. Elvey" <[email-masked]>
Date: Tue Apr 15 21:35:47 2003

Code Oops! see below:

>From: "Dwight K. Elvey" <[email-masked]>
>
>Hi
> Here is the code I have so far. I've shortened it a
---snip---
>
> BOOTSTRP.ASM
> 
>; 42 BYTE BOOTSTRAP LOADER WITH INIT FOR 8250
>; INTENDED FOR THE H89 BUT MAY ASLO WORK ON H8.
>
>
>        ORG 2300H
>LDR:    XRA A
>        OUT LCNTL       ; LINE CONTROL
>        OUT IER         ; NO INTERRUPTS
>        OUT MCNTL       ; INIT MODEM CONTROL
>        DCR A           ; SHOULD BE 'MVI A, 80H' BUT 0FFH OK?
>        OUT LCNTL
>        MVI A, 0CH      ; 9600 BAUD
>        OUT DVL
>        XRA A
>        OUT DVH
>        MVI A, 07H      ; 8 BIT 2 STOPS
>        OUT LCNTL
>        IN LSTAT
>        IN RX           ; CLEAR ANY JUNK
>        LXI H, 2400H    ; DEPENDS ON SIZE (TO BE DETERMINED)
>LDR1:   IN LSTAT
>        ANI 01
>        JZ LDR1         ; WAIT FOR CHAR
>        IN RX
>        MOV M,A
>        DCX H
>        JMP LDR         ; ADDRESS TO BE OVER WRITTEN BY CODE LOADED
>
should be:
        JMP LDR1         ; ADDRESS TO BE OVER WRITTEN BY CODE LOADED

Later
Dwight

---

From: "Dwight K. Elvey" <[email-masked]>
Date: Wed Apr 16 21:27:30 2003

Hi Sallam
 See embedded:

>From: "Vintage Computer Festival" <[email-masked]>
>
>My knowledge of 8080 assembly is totally weak, but here I go:
>
>On Tue, 15 Apr 2003, Dwight K. Elvey wrote:
>
>>  BOOTSTRP.ASM
>>
>Why not move this up so you don't have to repeat the XRA A?  Or does this
>have to be here?

 The idea is to clear the IER as early as one can to make
sure that no interrupts are generated. Since IER and DVH share
the same I/O address and are selected by the MSB of the LCNTL,
I needs to clear both LCNTL and IER first. Note: the DCR A
causes the MSB to be set for the LCNTL that selects the baud
rate registers, DVL and DVH.

>How does this work if the address is two bytes but the code is loaded one
>byte at a time?

 First, the last JMP LDR was suppose to be JMP LDR1 ( my typo ).
As long as the high part of the address of the new code to run was
the same as LDR1, by writing one byte at a time, overwriting
the same high part would not cause the JMP LDR1 to change its action.
The next byte to be over written would be the low part of the address.
when this happened, the JMP NEW would happen instead. One just need
to make sure that the start address of the NEW code has the same
high byte. In this case, I can just put it right after the JMP LDR1.
It would look something like:

Tail end of boot strap:

2328   DCX H
2329   JMP
232A   1E
232B   23

New code to run after load:

       ORG 232A
       DW $+2
NEW:   New code starts here
       .
       .
       .

 As you can see, the two will overlap and the final JMP of
the bootstrap will be modified to point to the new code on
the last loaded value. This is why it is loaded backwards.

 I should note that Patrick Rigney found one more byte to
remove. The sequence:

ANI 01
JZ LDR1

could be replaced by:

RAR
JNC LDR1

Later
Dwight

>
>-- 
>
>Sellam Ismail                                        Vintage Computer Festival
>------------------------------------------------------------------------------
>International Man of Intrigue and Danger                http://www.vintage.org
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